Wishbone Bus
The wishbone bus is an open-specification for a hardware protocol for connecting two hardware devices. These could be CPUs, RAMs,
Let’s Build a Rocket Chip
I’ve been looking at various open-source RISC-V cores to hook up to the 2D sprite renderer I’ve been working on,
Capturing frames from a simulated HDL VGA generator
I’ve been following Will Green’s excellent FPGA VGA Graphics in Verilog series, wherein he creates a VGA output block in
Interesting FPGA Project
This is an interesting FPGA project: http://www.electronics-lab.com/ultraminer-fpga-affordable-16-nm-xilinx-fpga-dev-board-crypto-mining/ It’s 100% dedicated to mining. No GPIOs (that I can see), no external
Microsoft Word is not a Great Blogging Platform
When I started this blog, I had this crazy idea that I’d do everything in Microsoft Word, on Windows 10,
Things I Plan on Blogging About but Probably Won’t
I’ve been bookmarking interesting articles. Tons of interesting articles. Any by “bookmarking” I mean emailing them to myself while sitting
Internet Archive
I randomly remembered the title of one of the first blogs I read as a kid. (Probably because it mentioned
A De-Facto PCI Express Standard Emerges
[Credit where credit is due] Thanks to John Piliounis (jopil@atlascom.gr) for pointing out a mistake in one of my PCIe
Default Logic
https://en.wikipedia.org/wiki/Default_logic People have actually bothered to express things like this in math. I’m impressed. Basically, they broke it down into
Fixing Compile Errors in MPLAB-X Harmony TCP/IP Project
I just bought a PIC32 Ethernet Starter Kit on eBay. I initially tried to follow this guide to setting up
