Homebrew Pentium Motherboard

I’ve been designing my own Pentium 1 motherboard. I originally wanted to connect a 386 or 486 to a modern FPGA and see if I could get DOS or Windows 3.1 to boot. However, CPUs from that era use “TTL” signaling (5v logic high). Modern FPGAs will literally break if you send 5v at them in any way. So I was about to give up, when I decided to widen my sense of what’s possible. I had assumed that newer chips were simply too complex. However, after looking at the Pentium 1 datasheet, it seems like the ideal CPU to use for a homemade motherboard. It uses CMOS signaling (3.3v high), which modern FPGAs support (for now!). The downside is, the Pentium has a 64-bit-wide data bus, and all 64 lines must be connected. Add on a 32-bit address bus (actually 37 lines for legacy compatibility reasons), and many control lines, and I calculate that you’ll need an FPGA with at least 141 GPIOs. Just for interfacing with the CPU. Want to add external RAM? Or VGA, keyboard, mouse, disk drives? That’s extra.

I’ve been designing the board using the excellent and free CircuitMaker tool. It’s basically Altium Designer, with some advanced features removed, and your projects must be public. No problem for me.


Due to the cost of the FPGA board I’ll have to buy, I probably won’t be working on this for awhile. But eventually, if all goes well, I’ll have a working board, and lot of Verilog to write to simulate a simple BIOS, northbridge, RAM, etc.

I also want to shout out to a similar project: https://hackaday.io/project/174327-wirewrap-pentium Projects like this one (and, I hope, mine) raise the collective bar for what’s possible for a hobbyist to accomplish. Nothing is truly out of reach, it just takes effort (and often some clever hacks to avoid spending too much money!)

2 responses to “Homebrew Pentium Motherboard”

  1. Very cool.
    I’m looking at this for inspiration for making an Amiga PC BridgeBoard card powered by the K2. Have you made any progress on the FPGA side of things? I’d love to make use of your code.
    I’m thinking to use an old 484 pin Stratix 1 as the FPGA. Plenty of GPIO, fast enough FPGA, probably 10k LE will be enough logic capacity?

    • Hi Greg,

      Ah, sorry, shortly after writing this, I sort of put the project on hold, because it’s just too ambitious for me to take on at the moment. I didn’t get far with the FPGA design, I tried to use the FPGA as a logic analyzer to see what the CPU puts on the bus initially, but I got frustrated with the tooling. I’ll probably get back to this someday if I find a logic analyzer solution that isn’t terrible.

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